<17/54> VDP1 User's Manual / 4.6 Transfer end status register

▲ Back ｜ Forward ▼

VDP1 User's Manual / Chapter 4 System Registers

■ 4.6 Transfer end status register

The transfer end status register (EDSR, End status register) indicates the end status of the immediately preceding frame processing. It is a read-only 16-bit register located at address 100010H. Set the unused bit to 0.

EDSR 100010H (R) bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CEF BEF

End-bit fetch status at the current frame: current end-bit fetch status (CEF), bit1

EDSR 100010H (R)	bit15	bit14	bit13	bit12	bit11	bit10	bit9	bit8	bit7	bit6	bit5	bit4	bit3	bit2	bit1	bit0
0	0	0	0	0	0	0	0	0	0	0	0	0	0	CEF	BEF

Indicates whether the end bit (drawing end command) was fetched from the command table in the frame currently being drawn. A value of 0 indicates that the end bit has not been fetched, and a value of 1 indicates that the end bit has been fetched and drawing has been completed.

CEF	End bit fetch state
0	Unfetched end bits in the current frame
1	Fetch end bit at current frame, end drawing

VDP1 fetches the command table in VRAM one after another and draws it in the frame buffer. Fetching the drawing end command (end bit is 1) ends the drawing process for one frame. At this time, CEF is set to 1. If data is transferred from the CPU to VRAM when drawing is completed (CEF = 1), the CPU can access VRAM without waiting, without the overhead of stopping drawing. Fetching the drawing end command, VDP1 sets CEF to 1 and generates an interrupt signal. There are two methods to judge the end of drawing, one is to check the fetch status of the end bit with CEF each time (polling), and the other is to use this interrupt signal. If there is no drawing end command in VRAM, even if it exists, this bit remains 0 if it is defined so that it cannot be fetched in jump format. This bit is initialized to 0 when switching the frame buffer or when drawing starts. If the fetch of the drawing end command matches when switching the frame buffer, CEF and BEF may not be 1.

End-bit fetch status in previous frame: before end-bit fetch status (BEF), bit 0

Indicates whether the end bit (drawing end command) was fetched from the command table in the previous frame. A value of 0 indicates that the end bit has not been fetched, and a value of 1 indicates that the end bit has been fetched and drawing has been completed.

BEF	End bit fetch state
0	Unfetched end bit in previous frame
1	Fetch end bit in previous frame, end drawing

VDP1 fetches the command table in VRAM one after another and draws it in the frame buffer. Fetching the drawing end command (end bit is 1) ends the drawing process for one frame. If there are many commands or many pixels to draw due to enlargement, drawing may not be completed within one frame, which is called "transfer over". This bit represents the transfer over status. If the transfer is over, you need to take measures such as reducing the number of drawing commands and the number of drawing pixels. If there is no drawing end command in VRAM, even if it exists, this bit remains 0 if it is defined so that it cannot be fetched in jump format. This bit is written with the CEF value when the frame buffer is switched or when drawing starts, and is retained until the next frame buffer switch.

▲ Back ｜ Forward ▼

★ HARDWARE Manual ★ VDP1 User's Manual