2. Reference

2.1 Data list

data		Data name	number
Interrupt register access management
	Interrupt mask bit value constant	none	1
	Interrupt status bit value constant	none	2
Registration and reference of interrupt processing routines
	Vector number constant	none	3

2.2 Data specifications

[Interrupt register access management]

List

Title Data specifications

Data Interrupt mask bit value constant

Data name none

No 1

The constants that can be set for the interrupt mask bit value are shown below. The value of each constant is set to 1 for 1 bit indicated by the constant and 0 for the others. Multiple settings can be made at once by ORing.

Constant name	explanation
INT_MSK_NULL	unspecified
INT_MSK_ALL	All specifications (specify all the bits shown below)
INT_MSK_ABUS	A-Bus
INT_MSK_SPR	Sprite drawing finished
INT_MSK_DMAI	DMA illegal
INT_MSK_DMA0	Level 0-DMA
INT_MSK_DMA1	Level 1-DMA
INT_MSK_DMA2	Level 2-DMA
INT_MSK_PAD	PAD
INT_MSK_SYS	System manager
INT_MSK_SND	Sound request
INT_MSK_DSP	DSP end
INT_MSK_TIM1	Timer-1
INT_MSK_TIM0	Timer-0
INT_MSK_HBLK_IN	H-Blank-IN
INT_MSK_VBLK_OUT	V-blank-OUT
INT_MSK_VBLK_IN	V-blank-IN

List

Title Data specifications

Data Interrupt status bit value constant

Data name none

No 2

The constants that can be set for the interrupt status bit value are shown below. The value of each constant is set to 1 for 1 bit indicated by the constant and 0 for the others. Multiple settings can be made at once by ORing.

Constant name	explanation
INT_ST_NULL	unspecified
INT_ST_ALL	All specifications (specify all the bits shown below)
INT_ST_ABUS	A-Bus (Specify bits A-Bus01 to 16)
INT_ST_ABUS01 ~ 16	A-Bus01 ~ 16
INT_ST_SPR	Sprite drawing finished
INT_ST_DMAI	DMA illegal
INT_ST_DMA0	Level 0-DMA
INT_ST_DMA1	Level 1-DMA
INT_ST_DMA2	Level 2-DMA
INT_ST_PAD	PAD
INT_ST_SYS	System manager
INT_ST_SND	Sound request
INT_ST_DSP	DSP end
INT_ST_TIM1	Timer-1
INT_ST_TIM0	Timer-0
INT_ST_HBLK_IN	H-Blank-IN
INT_ST_VBLK_OUT	V-blank-OUT
INT_ST_VBLK_IN	V-blank-IN

[Registration and reference of interrupt processing routine]

List

Title Data specifications

Data Vector number constant

Data name none

No 3

The constants that can be set for the vector number are shown below. SCU constant names can only be set on master SH2.
CPU constant names can be set on master and slave SH2.

Interrupt classification	Constant name	explanation
SCU	INT_SCU_ABUS	A-Bus
	INT_SCU_SPR	Sprite drawing finished
	INT_SCU_DMAI	DMA illegal
	INT_SCU_DMA0	Level 0-DMA
	INT_SCU_DMA1	Level 1-DMA
	INT_SCU_DMA2	Level 2-DMA
	INT_SCU_PAD	PAD
	INT_SCU_SYS	System manager
	INT_SCU_SND	Sound request
	INT_SCU_DSP	DSP end
	INT_SCU_TIM1	Timer-1
	INT_SCU_TIM0	Timer-0
	INT_SCU_HBLK_IN	H-Blank-IN
	INT_SCU_VBLK_OUT	V-blank-OUT
	INT_SCU_VBLK_IN	V-blank-IN
CPU	INT_CPU_DIVU	Divider
	INT_CPU_DMAC0	DMAC channel 0
	INT_CPU_DMAC1	DMAC channel 1
	INT_CPU_WDT	WDT interval
	INT_CPU_BSC	BSC compare match
	INT_CPU_SCI_ERI	SCI reception error
	INT_CPU_SCI_RXI	SCI received data full
	INT_CPU_SCI_TXI	SCI Received Data Empty
	INT_CPU_SCI_TEI	End of SCI transmission
	INT_CPU_FRT_ICI	FRT input capture
	INT_CPU_FRT_OCI	FRT output compare
	INT_CPU_FRT_OVI	FRT overflow