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■ 3.2 SCU

The SCU facilitates the interface of multiple processors connecting to the CPU-bus, A-bus, and B-bus. Furthermore, the DMA controller, the interrupt controller, and the DSP are carried inside.

● System configuration
An SMPC is connected to the CPU-bus to control the system reset signal and control pad.
A-bus is connected to devices that supply programs such as cartridges and CDs.
The SCU interrupt controller controls interrupts from A-bus, B-bus, and SMPC. It also supports timer interrupts, which can generate interrupts (INT signals) in synchronization with the screen display (Fig. 3.1).

Figure 3.1 SCU system configuration

● System specifications
Table 3.2 SCU system specifications
No Item specification remarks
1
 DSP
・ 32bit × 32bit → 48bit
・ 14MHz Note 1
・ Program RAM 32bit x 256word
・ DATA RAM 32bit x 64word x 4 ・ DMA instructions available
2
 DMA
・ 3ch for CPU, 1ch for DSP
・ 3 levels, 1 set of stack ・ Can be started by interrupt ・ Indirect mode available
Four
 Interrupt control
 -Timer (2ch) that synchronizes with the screen and
-Control of interrupts from external terminals
Five
 A-bus control
・ A-bus (external bus) bus sizing ・ Weight control ・ Burst size setting ・ Refresh control
6
 B-bus control
・ B-bus (internal bus) control
・ For VDP1, VDP2, SCSP only

● Function
The functions of SCU are shown below.

Data transfer between main CPU (SH-2), internal DSP, A-bus, B-bus
The SCU is equipped with CPU I / F, A-bus I / F, and B-bus I / F, and facilitates the interface between each I / F and multiple processors connected via a bus. I will do it. In addition, it is possible to transfer programs from the main CPU to the DSP inside the SCU. In addition, during data transfer between A-bus and B-bus, the work area can be accessed from the CPU using CPU-bus, and processing can be executed using independent buses in parallel. increase.

Interrupt control
Interrupts that span other processors are issued via the SCU. For example, when you want to display the volume level on the screen, the SCSP generates an interrupt for the screen display request to the SCU. In addition, the SCU recognizes the interrupt and issues the interrupt while synchronizing with the screen. At this time, an interrupt can be issued at any point (dot) on the screen.

Internal DSP
The SCU has a DSP inside. This is provided to realize processing that is difficult to achieve because the main CPU alone is overloaded.

Operating frequency
The operating frequency of the DSP inside the SCU operates at half the frequency of the main CPU. The relationship with the operating frequency of the main CPU is as follows.

Table 3.2.1 SCU-DMA clock details
Screen display mode SH-2 operating clock SCU-DSP operating clock
 320 dot mode (NTSC method)
 26.8741 MHz
 13.4371 MHz
 352 In dot mode (NTSC method)
 28.6364 MHz
 14.3182 MHz
 320 dot mode (PAL method)
 26.6877 MHz
 13.3439 MHz
 352 In dot mode (PAL method)
 28.4377 MHz
 14.2189 MHz

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HARDWARE ManualSega Saturn Overview Manual
Copyright SEGA ENTERPRISES, LTD., 1997