<25/29> SCSP User's Manual / 4.2.11 Timer

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SCSP User's Manual / 4.2 Sound Source Register

■ Timer register

SCSP has a total of three 8-bit up-count timers with prescalers, timers A, B, and C. The execution time of the prescaler can be set with "TACTL", "TBCTL", and "TCCTL" for each timer.

TACTL [2: 0] (W); Timer-A ConTroL

Specifies the increment cycle of timer A.

Table 4.26 Timer A increment cycle

TACTL	Increment cycle
0	Once per sample
1	Once in 2 samples
2	Once in 4 samples
3	Once in 8 samples
Four	Once in 16 samples
Five	Once in 32 samples
6	Once in 64 samples
7	Once in 128 samples

TBCTL [2: 0] (W); Timer-B ConTroL

Specifies the increment cycle of timer B.

Table 4.27 Timer B increment cycle

TBCTL	Increment cycle
0	Once per sample
1	Once in 2 samples
2	Once in 4 samples
3	Once in 8 samples
Four	Once in 16 samples
Five	Once in 32 samples
6	Once in 64 samples
7	Once in 128 samples

TCCTL [2: 0] (W); Timer-C ConTroL

Specifies the increment cycle of timer C.

Table 4.28 Timer C increment cycle

TCCTL	Increment cycle
0	Once per sample
1	Once in 2 samples
2	Once in 4 samples
3	Once in 8 samples
Four	Once in 16 samples
Five	Once in 32 samples
6	Once in 64 samples
7	Once in 128 samples

Table 4.29 shows the count period for the "TACTL", "TBCTL", and "TCCTL" settings, and Table 4.30 shows the shortest interrupt time ("TIMA" = "TIMB" = "TIMC" = "FEH"), and the longest interrupt time ("TIMA" = "TIMB" = "TIMC" = "FEH"). Indicates "TIMA" = "TIMB" = "TIMC" = "00H").

Table 4.29 Count period for TACTL, TBCTL, TCCTL settings

TACTL, TBCTL, TCCTL setting values	Count cycle (compared to 1Fs = 1 / 44.1K)	Actual count cycle time [μsec]
0H	Fs	22.6757
1H	Fs / 2	45.3515
2H	Fs / 4	90.7029
3H	Fs / 8	181.4059
4H	Fs / 16	362.8118
5H	Fs / 32	725.6236
6H	Fs / 64	1451.2472
7H	Fs / 128	2902.4943

Table 4.30 Shortest interrupt time and longest interrupt time

TACTL, TBCTL, TCCTL setting values	Shortest interrupt time [μsec]	Maximum interrupt time [msec]
0H	22.6757	5.8050
1H	45.3515	11.6100
2H	90.7029	23.2200
3H	181.4059	46.4399
4H	362.8118	92.8798
5H	725.6236	185.7596
6H	1451.2472	371.5193
7H	2902.4943	743.0385

Also, based on Table 4.29 and Table 4.30, the interrupt time can be calculated from the following formula.


Interrupt time = {225 (FFH) --TIMA (B, C) set value} × Count cycle time

The timer starts counting immediately after transferring the set value to "TIMA", "TIMB", and "TIMC". When this count value reaches FFH, an interrupt is generated by the timer that is enabled for interrupts (when the timer is not used, disable interrupts).

TIMA [7: 0] (W); TIMer-A count data

It is timer A. This timer is an UP counter and generates an interrupt request when all bits become "1B".

TIMB [7: 0] (W); TIMer-B count data

It is timer B. This timer is an UP counter and generates an interrupt request when all bits become "1B".

TIMC [7: 0] (W); TIMer-C count data

It is timer C. This timer is an UP counter and generates an interrupt request when all bits become "1B".

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