Chapter 5 DSP Operations in SCSP

■ 5.1 DSP configuration

Figure 5.1 shows the DSP configuration diagram.

Figure 5.1 DSP configuration diagram

■ 5.2 RAM in DSP

EXTS [15: 0] (R); EXTernal Stack

Represents a data buffer for digital audio inputs.

MIXS [19: 0] (R / W); MIX Stack

Represents the sound data buffer from the input mixer.

MEMS [23: 0] (R / W); MEMory Stack

Represents an input data buffer from sound memory.

TEMP [23: 0] (R / W); TEMPorary register

Represents a DSP work buffer (128 words). The DSP work buffer has a ring buffer configuration, and the pointer is decremented by 1 for each sample.

COEF [12: 0] (R / W); COEFficient register

Represents a buffer of DSP coefficients.

MADRS [16: 1] (R / W); Memory ADdReSs register

Represents a buffer of DSP addresses.

MPRO [63: 0] (R / W); Micro PROgram register

Represents the buffer of a DSP microphone program.

EFREG [15: 0] (R / W); EFfect REGister

Represents a DSP output buffer.