Chapter 1 Overview

■ 1.1 SCU overview

The SCU (System Control Unit) is equipped with a CPU I / F, A-Bus I / F, and B-Bus I / F, and facilitates the interface between each I / F and multiple processors connected via a bus. It's something to do. Furthermore, the DMA controller, the interrupt controller, and the DSP are carried inside.

The DMA controller controls DMA transfer of a total of 4 channels of internal level 2-0 and DSP, and can freely execute data transfer between CPU, A-Bus, and B-Bus. Also, during DMA execution between A-Bus and B-Bus, the CPU can use CPU-Bus to access the work area. However, the data transfer request from the DSP must always use the DSP area. For example, the DMA transfer between A-Bus and B-Bus that does not use the DSP area cannot request data transfer from the DSP. ..

The interrupt controller controls the entire interrupt in the SCU, including interrupts from A-Bus, B-Bus, and SMPC. It also supports timer interrupts, which can be synchronized with the screen to generate interrupts.

The DSP plays a role in achieving processing that is difficult to achieve because the main CPU is overloaded. The DSP operates at half the operating frequency of the main CPU.
Therefore, 1 step is executed in about 70nsec.

◆ System configuration diagram

Figure 1.1 shows the system configuration diagram. WORK RAM-H, WORK RAM-L, BACKUP-RAM, IPL ROM, and SMPC are connected to the CPU-Bus to control the system reset signal and control pad.

A medium that supplies software such as CDs and cartridges is connected to the A-Bus as an external system. VDP1, VDP2, and SCSP are connected to B-Bus to control video and audio.

Figure 1.1 System configuration diagram

◆ Block diagram

Figure 1.2 shows a block diagram of the SCU. As mentioned before, the SCU is equipped with a CPU, A-Bus, and B-Bus interfaces, a DMA controller, an interrupt controller, and a DSP.
Each interface and each controller are connected by a bus to enable data transfer.
The connection between the CPU I / F and the A-Bus I / F is made by two Buses, but the upper part is the connection via the register and the lower part is the connection used for data transfer. Therefore, DMA transfer is performed using the Bus at the bottom.

Figure 1.2 Block diagram