When accessing an area that can be rewritten by a device other than the CPU, such as the I / O port, work RAM of an external device, or SCU register, if the cache is hit, a value different from the actual value will be returned. there is. In such a case, you have to access the cache-through area.
Figure 1.4 shows the operation explanation when a cache hit occurs, and Figure 1.5 shows the cache-through mapping. Figure 1.4 Explanation of operation when a cache hits
Figure 1.5 SCU mapping (Cashe_through_address)
