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SMPC User's Manual / Chapter 2 SMPC Commands

■ 2.3 Reset system management command

The details of the reset system management command are shown in a table format. How to read the table of each command and notes are as follows. Also, by using the status flag in all commands, you can manage the double issuance of commands.

● SMPC interrupt
Those described as "occurred" generate an SMPC interrupt to SH-2 via the SCU at the end of the command. In addition, interrupts can be enabled / disabled by setting the SCU.

● IREG, OREG

By using with the status flag (SF)

Can be judged.

● Execution time
Shows the execution time calculated from the number of steps in the SMPC internal firmware. If it collides with an internal task such as RTC increment, the command execution time will change, so it is described in the range of the minimum value and the maximum value.


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No.1

MSHON

Master SH-2 ON

Command code 00H
SMPC interrupt cannot occur IREG unused OREG 31
Execution time max = xxx
        min = 30μsec

Function content
Turn on the master SH-2.

Command parameters
none

Result parameters
OREG31 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
2010005FH 0 0 0 0 0 0 0 0

remarks
The use of users is prohibited.


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No.2

SSHON

Slave SH-2 ON

Command code 02H
SMPC interrupt cannot occur IREG unused OREG 31
Execution time max = xxx
        min = 30μsec

Function content
Turn on the slave SH-2.

Command parameters
none

Result parameters
OREG31 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
2010005FH 0 0 0 0 0 0 1 0

remarks
none


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No.3

SSHOFF

Slave SH-2 OFF

Command code 03H
SMPC interrupt cannot occur IREG unused OREG 31
Execution time max = xxx
        min = 30μsec

Function content
Turn off the slave SH-2.

Command parameters
none

Result parameters
OREG31 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
2010005FH 0 0 0 0 0 0 1 1

remarks
Issuing this command is prohibited under the following conditions.

When the slave SH-2 is accessing the external bus (A-Bus, B-Bus, CPU-Bus).

In other words, it cannot be used except when the slave SH-2 is accessing only the cache inside the CPU.

If the above management is difficult on the application side, use the system library clock change ( SYS_CHGSYSCK ).


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No.4

SNDON

Sound ON

Command code 06H
SMPC interrupt cannot occur IREG unused OREG 31
Execution time max = xxx
        min = 30μsec

Function content
Turn on the sound CPU (MC68EC000).

Command parameters
none

Result parameters
OREG31 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
2010005FH 0 0 0 0 0 1 1 0

remarks
See Sound OFF command.


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No.5

SNDOFF

Sound off

Command code 07H
SMPC interrupt cannot occur IREG unused OREG 31
Execution time max = xxx
        min = 30μsec

Function content
Turn off the sound CPU (MC68EC000).

Command parameters
none

Result parameters
OREG31 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
2010005FH 0 0 0 0 0 1 1 1

remarks
When stopping the sound CPU, be sure to strictly observe the following restrictions.

<< Restrictions on stopping and starting sound blocks >>

The sound block must be stopped and there must be no non-access period of 0.5 seconds or more from the main system (SH2 side) to the sound RAM.
If you want to stop the sound block, stop it only for the minimum necessary period such as loading the sound driver, and restart it immediately.
If you do not need to use the sound CPU (MC68EC000), you need to take measures such as executing a dummy program (simply an infinite loop).
If this restriction is not observed, the operation of sound RAM and sound block cannot be guaranteed.


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No.6

CDON

CD ON

Command code 08H
SMPC interrupt cannot occur IREG unused OREG 31
Execution time max = xxx
        min = 40μsec

Function content
Turn on the CD.

Command parameters
none

Result parameters
OREG31 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
2010005FH 0 0 0 0 1 0 0 0

remarks
The use of users is prohibited.


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No.7

CDOFF

CD OFF

Command code 09H
SMPC interrupt cannot occur IREG unused OREG 31
Execution time max = xxx
        min = 40μsec

Function content
Turn off the CD.

Command parameters
none

Result parameters
OREG31 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
2010005FH 0 0 0 0 1 0 0 1

remarks
By executing this command, the contents of (DRAM) in the CD buffer are not retained.

The use of users is prohibited.


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No.8

SYSRES

Whole system reset

Command code 0DH
SMPC interrupt cannot occur IREG unused OREG 31
Execution time 100msec + α

Function content
Resets the entire Sega Saturn system.

Command parameters
none

Result parameters
OREG31 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
2010005FH 0 0 0 0 1 1 0 1

remarks
By executing this command, all functions are reset (initialized), the master SH-2 operates from the power ON vector, and the boot ROM is started. All memory contents except 256Kbit battery backup RAM are not retained.

The use of users is prohibited.


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No.9

CKCHG352

Clock change 352 mode

Command code 0EH
SMPC interrupt cannot occur IREG unused OREG 31
Execution time 100msec + α

Function content
Switches the Sega Saturn system clock from 320 mode to 352 mode.

Command parameters
none

Result parameters
OREG31 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
2010005FH 0 0 0 0 1 1 1 0

remarks
Issuing this command is prohibited from issuing from the application. Call the clock change routine in the Sega Saturn boot ROM.

When the clock change is executed, each LSI becomes as follows.

VDP1, VDP2, SCU, SCSP: Default value when power is turned on
Master SH-2: Return from boot ROM clock change routine
Slave SH-2: OFF
CD block: hold
Work RAM: Hold
VRAM: not retained

The use of users is prohibited.
If you want to use it, use the system library clock change (SYS_CHGSYSCK).


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No.10

CKCHG320

Clock change 320 mode

Command code 0FH
SMPC interrupt cannot occur IREG unused OREG 31
Execution time 100msec + α

Function content
Switches the Sega Saturn system clock from 352 mode to 320 mode.

Command parameters
none

Result parameters
OREG31 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
2010005FH 0 0 0 0 1 1 1 1

remarks
Issuing this command is prohibited from issuing from the application. Call the clock change routine in the Sega Saturn boot ROM.

When the clock change is executed, each LSI becomes as follows.

VDP1, VDP2, SCU, SCSP: Default value when power is turned on
Master SH-2: Return from boot ROM clock change routine
Slave SH-2: OFF
CD block: hold
Work RAM: Hold
VRAM: not retained

The use of users is prohibited.
If you want to use it, use the system library clock change (SYS_CHGSYSCK).


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No.11

NMIREQ

NMI request

Command code 18H
SMPC interrupt cannot occur IREG unused OREG 31
Execution time max = xxx
        min = 30μsec

Function content
Request NMI from master SH-2.

Command parameters
none

Result parameters
OREG31 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
2010005FH 0 0 0 1 1 0 0 0

remarks
Requests NMI unconditionally, even if disabled by the RESDISA command.


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No.12

RESENAB

Reset enable

Command code 19H
SMPC interrupt cannot occur IREG unused OREG 31
Execution time max = xxx
        min = 30μsec

Function content
In Sega Saturn, NMI is generated when the reset button on the main unit panel is pressed. This command is a command to enable NMI generation.
The default value when booting with BOOR ROM is enabled.

Command parameters
none

Result parameters
OREG31 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
2010005FH 0 0 0 1 1 0 0 1

remarks
To prevent chattering, NMI occurs when the reset button is pressed for 3VINT (3 / 60sec).


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No.13

RESDISA

Reset disable

Command code 1AH
SMPC interrupt cannot occur IREG unused OREG 31
Execution time max = xxx
        min = 30μsec

Function content
In Sega Saturn, NMI is generated when the reset button on the main unit panel is pressed. This command disables NMI generation.
The default value when booting with BOOR ROM is enabled.

Command parameters
none

Result parameters
OREG31 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
2010005FH 0 0 0 1 1 0 1 0

remarks
The status of the reset switch is only indicated by the RESB bit (bit4) of the SR (status register), and NMI output to the master SH-2 is not performed. The RESB bit indicates the state of the button at the time of V-BLANK-IN.


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HARDWARE ManualSMPC User's Manual
Copyright SEGA ENTERPRISES, LTD., 1997