Chapter 7 Line screen

There are two line screens, a line color screen (LNCL) and a back screen (BACK), and you can specify the color for each line or specify the entire screen as a single color. Unlike the scroll screen, characters cannot be displayed. To use the line color screen, store the data for each line in VRAM as a line color screen table. In the case of a single color, the data at the beginning of the table is used for the entire screen. The line screen is shown in Figure 7.1.

Figure 7.1 Line screen

Line screen table (VRAM) Line screen　
┌──────────────┐ ┏━━━━━━━━━━━━━━━───　
│ Line screen data of the 1st line │ ──── → ┃ 1st line ├──────────────┤ ┣━━━━━━━━━━━━━━　
│ Line screen data of the 2nd line │ ──── → ┃ 2nd line ├──────────────┤ ┣━━━━━━━━━━━━━━　
│ Line screen data of the 3rd line │ ──── → ┃ 3rd line ├──────────────┤ ┣━━━━━━━━━━━━━━　
│ Line screen data of the 4th line │ ┃:　
├──────────────┤ ┃　
│: │ ┃　
├──────────────┤ ┃　
　
[Note] In the case of a single color, the data of the first line is used for the entire screen.　

■ 7.1 Line color screen

The line color screen (LNCL) is a screen used only for color calculation, and you can select whether to specify the entire screen as a single color or specify the color for each line. The color RAM address of the color used for that line is stored in VRAM as line color screen data.

The number of lines specified by one line color screen data changes depending on the interlace setting. In non-interlaced and double-dense interlaced modes, you can specify a color for each line, but in single-dense interlaced mode, you can only specify every two lines.
The line color screen can also be rotated by using the line color screen data in the coefficient data. For the coefficient data, refer to " 6.4 Coefficient Table Control ".
Figure 7.2 shows the configuration of the line color screen table for each interlaced mode, and Figure 7.3 shows the configuration of the data on the line color screen table.

Figure 7.2 Line color screen table configuration

● Non-interlaced and double-dense interlaced modes

	Bit 15 ← Line color screen table (VRAM) → 0
+ 00H	1st line color RAM address
+ 02H	2nd line color RAM address
+ 04H	3rd line color RAM address
+ 06H	4th line color RAM address
+ 08H	5th line color RAM address
+ 0AH	6th line color RAM address
:: ::	:: ::

[note]

In the case of a single color, the color RAM address of the first line is used for the entire line color.
For dense interlacing, store line color data for even and odd fields together

● Single-dense interlaced mode

	Bit 15 ← Line color screen table (VRAM) → 0
+ 00H	Color RAM address for the 1st and 2nd lines
+ 02H	Color RAM address for 3rd and 4th lines
+ 04H	Color RAM addresses on the 5th and 6th lines
+ 06H	Color RAM address for lines 7 and 8
+ 08H	Color RAM address of 9th and 10th lines
+ 0AH	Color RAM address for lines 11 and 12
:: ::	:: ::

[note]

In the case of a single color, the color RAM addresses of the 1st and 2nd lines are used for the entire line color.

Figure 7.3 Bit configuration of line color screen table data

15	14	13	12	11	Ten	9	8	7	6	5	4	3	2	1	0
					Color RAM address 11 bits

The part is ignored.

Also, when the color RAM mode is mode 0 or mode 2, the most significant bit of the address is ignored.

● Line color screen table address register

The line color screen table address register specifies the color mode of the line color screen and the start address of the table. It is a write-only 32-bit register located at addresses 1800A8H to 1800AAH. After turning on the power or resetting, the value will be cleared to 0, so be sure to set it.

LCTAU 1800A8

15	14	13	12	11	Ten	09 09	08 08
LCCLMD	---	---	---	---	---	---	---

07 07	06 06	05 05	04	03 03	02 02	01 01	00
---	---	---	---	---	LCTA18	LCTA17	LCTA16

LCTAL 1800AA

15	14	13	12	11	Ten	09 09	08 08
LCTA15	LCTA14	LCTA13	LCTA12	LCTA11	LCTA10	LCTA9	LCTA8

07 07	06 06	05 05	04	03 03	02 02	01 01	00
LCTA7	LCTA6	LCTA5	LCTA4	LCTA3	LCTA2	LCTA1	LCTA0

　

Line color screen color mode bit : LNCL color mode bit (LCCLMD), bit 15

Line color Specifies the color mode of the screen.

LCCLMD	Line color screen color
0	Make it a single color
1	Specify for each line

　

Line color screen table address bit : LNCL table address bit (LCTA18 to LCTA0)

Specifies the start address of the line color screen table in VRAM.

LCTA18 ~ LCTA16	1800A8H	Bits 2-0
LCTA15 ~ LCTA0	1800AAH	Bits 15-0

The actual start VRAM address is calculated by the following formula. If the VRAM capacity is 4M bits, the most significant bit of the address is ignored.

(Line color screen table start address)
           = (Line color screen table address register value 19 bits) x 2H