HARDWARE ManualVDP2 User's ManualChapter 7 Line Screen
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VDP2 User's Manual / Chapter 7 Line Screen

■ 7.2 Back screen

The back screen (BACK) is a screen that is displayed only when no other screen is displayed, and you can select whether to make the entire screen a single color or specify a color for each line. Specify the color data used in the line with 5 bits each for RGB.
In non-interlaced and double-dense interlaced modes, you can specify a color for each line, but in single-dense interlaced mode, you can only specify every two lines.
Figure 7.4 shows the configuration of the back screen table for each interlaced mode, and Figure 7.5 shows the configuration of the data on the back screen table.

Figure 7.4 Back screen table configuration

● Non-interlaced and double-dense interlaced modes
 Bit 15 ← Back screen table (VRAM) → 0
+ 00H RGB data of the first line
+ 02H 2nd line RGB data
+ 04H RGB data of the 3rd line
+ 06H 4th line RGB data
+ 08H RGB data of the 5th line
+ 0AH 6th line RGB data
::
::
::
::
[note]
In the case of a single color, the RGB data of the first line is used for the entire line color.
For dense interlacing, store line color data for even and odd fields together

● Single-dense interlaced mode
 Bit 15 ← Back screen table (VRAM) → 0
+ 00H RGB data for the 1st and 2nd lines
+ 02H RGB data for the 3rd and 4th lines
+ 04H RGB data of the 5th and 6th lines
+ 06H RGB data of the 7th and 8th lines
+ 08H RGB data of 9th and 10th lines
+ 0AH RGB data for the 11th and 12th lines
::
::
::
::
[note]
In the case of a single color, the RGB data of the 1st and 2nd lines is used for the entire line color.

Figure 7.5 Bit configuration of back screen table data

 15
 14
 13
 12
 11
 Ten
 9
 8
 7
 6
 5
 4
 3
 2
 1
 0
BLUE data 5 bits GREEN data 5 bits RED data 5 bits

The part is ignored.
Also, add 0 to each lower part of RGB by 3 bits to make it 8 bits.

● Back screen table address register

The back screen table address register specifies the color mode of the back screen and the start address of the table. A write-only 32-bit register located at addresses 1800ACH to 1800AEH. After turning on the power or resetting, the value will be cleared to 0, so be sure to set it.

BKTAU 1800AC
 15
 14
 13
 12
 11
 Ten
 09 09
 08 08
 BKCLMD
 ---
 ---
 ---
 ---
 ---
 ---
 ---

 07 07
 06 06
 05 05
 04
 03 03
 02 02
 01 01
 00
 ---
 ---
 ---
 ---
 ---
 BKTA18
 BKTA17
 BKTA16 

BKTAL 1800AE
 15
 14
 13
 12
 11
 Ten
 09 09
 08 08
 BKTA15
 BKTA14
 BKTA13
 BKTA12
 BKTA11
 BKTA10
 BKTA9
 BKTA8

 07 07
 06 06
 05 05
 04
 03 03
 02 02
 01 01
 00
 BKTA7
 BKTA6
 BKTA5
 BKTA4
 BKTA3
 BKTA2
 BKTA1
 BKTA0

Back screen color mode bit : BACK color mode bit (BKCLMD), bit 15
Specifies the color mode of the back screen.

BKCLMD Back screen color
 0
Make it a single color
 1
Specify for each line

Back screen table address bit : BACK color table address bit (BKTA18 to BKTA0)
Specify the start address of the back screen table on VRAM.

BKTA18 ~ BKTA16 1800ACH Bits 2-0
BKTA15 ~ BKTA0 1800AEH Bits 15-0

The actual start VRAM address is calculated by the following formula. If the VRAM capacity is 4M bits, the most significant bit of the address is ignored.


(Back screen table start address)
             = (Back screen table address register value 19 bits) x 2H

When the back screen color mode bit is set to "single color", the color data specified by the back screen table address bit is used for the entire screen.


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HARDWARE ManualVDP2 User's ManualChapter 7 Line Screen
Copyright SEGA ENTERPRISES, LTD., 1997