<27/29> SCSP User's Manual / 4.2.13 DMA Transfer

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SCSP User's Manual / 4.2 Sound Source Register

■ DMA transfer register

DMA with built-in SCSP can only transfer between SCSP's built-in control register and sound memory. Therefore, the maximum number of continuous transfer bytes is 3812 bytes (for EE4H) (the memory space of 100000H to 100EE3H is allocated to the internal register). In addition, it is prohibited to change the DMA-related registers explained below by DMA transfer. During DMA transfer, the address always changes in the increasing direction. The following are notes on executing DMA transfer.

Notes

During DMA execution, the operating speed of the main CPU and sound CPU may slow down.
Access to the control register of the DMA controller by DMA transfer is absolutely prohibited. We cannot guarantee the operation of this transfer.
DMA transfer is a word (16 bit) transfer.

DGATE (R / W); Dma GATE (and "0")

A block diagram of the DMA controller is shown in Figure 4.59. Initializes any area on the SCSP built-in control register or sound memory to "0". When this bit is "1B", "0" clear is executed ("DEXE" must be executed to actually start).
The erase ("0" write) operation of the transfer by DGATE does not affect the data at the transfer source. Also, the data will not be lost.

Figure 4.59 DMA controller block diagram

DDIR (R / W); Dma (transferring) DIRection

Specifies the direction of DMA transfer. When this bit is "0B", it is transferred from the sound memory to the LSI internal register, and when it is "1B", it is specified in reverse.

Table 4.32 DMA transfer direction

DDIR	Transfer direction
0	Transfer from sound memory to LSI internal register
1	Transfer from LSI internal register to sound memory

DEXE (R / W); Dma EXEcution

Instructs the start of DMA transfer. DMA transfer is started when this bit is "1B". Writing "0B" is invalid. Also, when the DMA transfer is completed, it automatically becomes "0B".

Table 4.33 DMA transfer

DEXE	Transfer status
0	Invalid or end of transfer
1	DMA transfer start

DMEA [19: 1] (W); Dma MEmory start Address

Specifies the address (in words) of the sound memory that starts the DMA transfer.

DRGA [11: 1] (W); Dma ReGister start Address

Specifies the address (word unit) of the LSI internal register that starts DMA transfer.

DTLG [11: 1] (W); Dma (Transferring) LenGth

Specifies the number of transfer words for DMA transfer. At that time, care must be taken so that the transfer source and transfer destination areas do not exceed the sound memory area or the LSI internal register area.

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