HARDWARE ManualVDP2 User's ManualChapter 5 Normal scroll screen
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VDP2 User's Manual / Chapter 5 Normal Scroll Screen

■ 5.2 Enlargement / reduction function

NBG0 and NBG1 can scale the entire screen horizontally and vertically. Scale control is performed by specifying in the register the horizontal and vertical coordinate increments required to calculate the display coordinates.
If you want to reduce the image horizontally, you must set the reduction enable register, and some screens may not be displayed depending on the setting.
The display coordinates are calculated by the following formula. At this time, the decimal part of the calculation result is rounded down.

(Display coordinate value X) = (Coordinate increment X) × (H counter value) + (Screen scroll value X)

(Display coordinate value Y) = (Coordinate increment Y) × (V counter value) + (Screen scroll value Y)

Screen scaling is controlled by setting horizontal and vertical coordinate increments in the coordinate increment register. Horizontal Coordinate Increment Integer part bit and horizontal coordinate increment The decimal part bit specifies the horizontal coordinate increment, and the vertical coordinate increment integer part bit and the horizontal coordinate increment decimal part bit specify the horizontal coordinate increment.
A decimal bit is added immediately below the integer bit. The bit configuration is shown in Figure 5.2.

Figure 5.2 Configuration of coordinate increment register
● Horizontal and vertical coordinate increment registers 
Bit 
31 18 16 15 8 7 0 
┌─┬─┬─┬─┬─┰─┬─┬─┬─┬─┬─┬─┬─┰─┬─┬─┰─┬─┬─┬─┬─┬─┬ ┬─┬─┬─┬─┬─┬─┐
│ − │ − │ − │ − │ − ┃ − │ − │ − │ − │ − │ − │ − │ − ┃ │ │ │ ┃ │ │ │ │ │ │ │ │-│
└─┴─┴─┴─┴─┸─┴─┴─┴─┴─┴─┴─┴─┸─┴─┴─┸─┴─┴─┴─┴─┴─┴─ ┴─┴─┴─┴─┴─┴─┘
└───┘ └───────────┘ 
Integer part Decimal part 

● Coordinate increment register

The coordinate increment register specifies the coordinate increment when performing coordinate calculations on the scroll screen. It is a write-only 32-bit register located at addresses 180078H to 18007EH and 180088H to 18808EH. After turning on the power or resetting, the value will be cleared to 0, so be sure to set it.

ZMXIN0 180078H
 15
 14
 13
 12
 11
 Ten
 09 09
 08 08
 ---
 ---
 ---
 ---
 ---
 ---
 ---
 ---

 07 07
 06 06
 05 05
 04
 03 03
 02 02
 01 01
 00
 ---
 ---
 ---
 ---
 ---
 N0ZMXI2
 N0ZMXI1
 N0ZMXI0 

ZMXDN0 18007AH
 15
 14
 13
 12
 11
 Ten
 09 09
 08 08
 N0ZMXD1
 N0ZMXD2
 N0ZMXD3
 N0ZMXD4
 N0ZMXD5
 N0ZMXD6
 N0ZMXD7
 N0ZMXD8

 07 07
 06 06
 05 05
 04
 03 03
 02 02
 01 01
 00
 ---
 ---
 ---
 ---
 ---
 ---
 ---
 --- 

ZMYIN0 18007CH
 15
 14
 13
 12
 11
 Ten
 09 09
 08 08
 ---
 ---
 ---
 ---
 ---
 ---
 ---
 ---

 07 07
 06 06
 05 05
 04
 03 03
 02 02
 01 01
 00
 ---
 ---
 ---
 ---
 ---
 N0ZMYI2
 N0ZMYI1
 N0ZMYI0 

ZMYDN0 18007EH
 15
 14
 13
 12
 11
 Ten
 09 09
 08 08
 N0ZMYD1
 N0ZMYD2
 N0ZMYD3
 N0ZMYD4
 N0ZMYD5
 N0ZMYD6
 N0ZMYD7
 N0ZMYD8

 07 07
 06 06
 05 05
 04
 03 03
 02 02
 01 01
 00
 ---
 ---
 ---
 ---
 ---
 ---
 ---
 --- 

ZMXIN1 180088H
 15
 14
 13
 12
 11
 Ten
 09 09
 08 08
 ---
 ---
 ---
 ---
 ---
 ---
 ---
 ---

 07 07
 06 06
 05 05
 04
 03 03
 02 02
 01 01
 00
 ---
 ---
 ---
 ---
 ---
 N1ZMXI2
 N1ZMXI1
 N1ZMXI0 

ZMXDN1 18008AH
 15
 14
 13
 12
 11
 Ten
 09 09
 08 08
 N1ZMXD1
 N1ZMXD2
 N1ZMXD3
 N1ZMXD4
 N1ZMXD5
 N1ZMXD6
 N1ZMXD7
 N1ZMXD8

 07 07
 06 06
 05 05
 04
 03 03
 02 02
 01 01
 00
 ---
 ---
 ---
 ---
 ---
 ---
 ---
 --- 

ZMYIN1 18008CH
 15
 14
 13
 12
 11
 Ten
 09 09
 08 08
 ---
 ---
 ---
 ---
 ---
 ---
 ---
 ---

 07 07
 06 06
 05 05
 04
 03 03
 02 02
 01 01
 00
 ---
 ---
 ---
 ---
 ---
 N1ZMYI2
 N1ZMYI1
 N1ZMYI0 

ZMYDN1 18008EH
 15
 14
 13
 12
 11
 Ten
 09 09
 08 08
 N1ZMYD1
 N1ZMYD2
 N1ZMYD3
 N1ZMYD4
 N1ZMYD5
 N1ZMYD6
 N1ZMYD7
 N1ZMYD8

 07 07
 06 06
 05 05
 04
 03 03
 02 02
 01 01
 00
 ---
 ---
 ---
 ---
 ---
 ---
 ---
 ---

    

Coordinate increment bit : Zoom bit
(N0ZMXI2 ~ N0ZMXI0, N0ZMXD1 ~ N0ZMXD8, N0ZMYI2 ~ N0ZMYI0, N0ZMYD1 ~ N0ZMYD8, N1ZMXI2 ~ N1ZMXI0, N1ZMXD1 ~ N1ZMXD8, N1ZMXD1 ~ N1ZMXD8, N1ZMXD1 ~ N1ZMXD8, N1ZMYI2 ~ N1Z Specifies horizontal and vertical coordinate increments for.

N0ZMXI2 to N0ZMXI0 180078H Bits 2-0 NBG0 Horizontal direction (integer part)
N0ZMXD1 to N0ZMXD8 18007AH Bits 15-8 NBG0 for horizontal direction (decimal part)
N0ZMYI2 to N0ZMYI0 18007CH Bits 2-0 NBG0 for vertical direction (integer part)
N0ZMYD1 to N0ZMYD8 18007EH Bits 15-8 NBG0 for vertical direction (decimal part)
N1ZMXI2 to N1ZMXI0 180088H Bits 2-0 NBG1 for horizontal direction (integer part)
N1ZMXD1 ~ N1ZMXD8 18008AH Bits 15-8 NBG1 for horizontal direction (decimal part)
N1ZMYI2 to N1ZMYI0 18008CH Bits 2-0 NBG1 for vertical direction (integer part)
N1ZMYD1 ~ N1ZMYD8 18008EH Bits 15-8 NBG1 for vertical direction (decimal part)

Set the coordinate increment to a value less than 1 for enlarged display, and set the coordinate increment to a value greater than 1 for reduced display. When the coordinate increment is 1, it is displayed normally. All specifications are positive values. The coordinate increments for NBG2 and NBG3 are fixed at 1.
You can also change the coordinate increment value from the middle of the screen by changing the value during the horizontal blanking interval.
To display the reduced display in the horizontal direction, it is necessary to set the reduced enable register. Do not set the horizontal coordinate increment to a value outside the setting range determined by the reduction enable bit setting. Table 5.1 shows the horizontal coordinate increment and contraction settings.

Table 5.1 Horizontal coordinate increment and contraction settings
Horizontal reduced display setting Horizontal coordinate increment setting range
Impossible 0 ≤ (horizontal coordinate increment) ≤ 1
Up to 1/2 possible 0 ≤ (horizontal coordinate increment) ≤ 2
Up to 1/4 possible 0 ≤ (horizontal coordinate increment) ≤ 4

● Reduction enable register

The reduction enable register controls the horizontal reduction display. A write-only 16-bit register located at address 180098H. After turning on the power or resetting, the value will be cleared to 0, so be sure to set it.

ZMCTL 180098H
 15
 14
 13
 12
 11
 Ten
 09 09
 08 08
 ---
 ---
 ---
 ---
 ---
 ---
 N1ZMQT
 N1ZMHF

 07 07
 06 06
 05 05
 04
 03 03
 02 02
 01 01
 00
 ---
 ---
 ---
 ---
 ---
 ---
 N0ZMQT
 N0ZMHF

    
Zoom enable bit : Zoom quarter / half bit (N1ZMQT, N1ZMHF, N0ZMQT, N0ZMHF)
Specify the maximum horizontal reduction range of each normal scroll screen.

N0ZMHF 180098H Bit 0 For NBG0
N0ZMQT 180098H Bit 1 For NBG0
N1ZMHF 180098H Bit 8 For NBG1
N1ZMQT 180098H Bit 9 For NBG1

NxZMQT NxZMHF Horizontal reduced display Limitations
 0
 0
Impossible none
 0
 1
Up to 1/2 possible Can be set only when the number of character colors is 16 or 256
 1
 0
Possible up to 1/4 Can be set only when the number of character colors is 16
 1
 1
Possible up to 1/4 Can be set only when the number of character colors is 16
Note The x in the bit name can be 0 or 1.

For reduction to 1/2, set the number of character colors (bitmap pattern colors) of the corresponding screen to 16 or 256 colors. Set the reduction to 1/4 to 16 colors.
The horizontal coordinate increment should not exceed the set range of these bits.

Some screens may not be displayed depending on the reduction setting. The limits are shown in Table 5.2.

Table 5.2 Restrictions on the display screen by setting the reduction enable bit
screen Number of character colors (number of bitmap pattern colors) Shrink enable setting Screen that cannot be displayed
NBG0 16 colors Up to 1/2 possible none
Possible up to 1/4 NBG2
256 colors Up to 1/2 possible NBG2
NBG1 16 colors Up to 1/2 possible none
Possible up to 1/4 NBG3
256 colors Up to 1/2 possible NBG3


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HARDWARE Manual VDP2 User's ManualChapter 5 Normal scroll screen
Copyright SEGA ENTERPRISES, LTD., 1997