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SCU User's Manual / Chapter 3 Register Details

■ 3.3 DSP control port

◆ DSP program control port

Figure 3.14 shows the details of the DSP program control port.

Figure 3.14 DSP program control port (register: PPAF) Initial value 00000000H
bit
 31
 twenty four
 twenty three
 16
 15
 8
 7
 0
 25FE0080 − − − − − 1 2 − 3 4 5 6 7 8 9 Ten 11 − − − − − − − 12 13 14 15 16 17 18 19
 Pause release flag (1 [bit 26] in Fig. 3.14)
 PR (W) execute Pause Reset flag
 When the program execution control flag (see below) is 1, writing 1 to this flag cancels the pause and starts execution. The state does not change when it is not paused or when the program execution flag is 0.
 Pause flag (2 [bit 25] in Fig. 3.14)
 EP (W) Execute Pause flag
 When the program execution control flag (see below) is 1, writing 1 to this flag will suspend the running program. The state does not change when it is paused or when the program execution flag is 0.
 D0-Bus DMA execution flag (3 [bit 23] in Fig. 3.14)
 T0 (R) Transfer 0
 This flag is set to 1 when running DMA using D0-Bus.
 Sign flag (4 [bit 22] in Fig. 3.14)
 S (R) Sign flag
 This flag becomes 1 when the operation result becomes negative.
 Zero flag (5 [bit 21] in Fig. 3.14)
 Z (R) Zero flag
 When the operation result becomes 0, this flag becomes 1.
 Carry flag (6 [bit 20] in Fig. 3.14)
 C (R) Curry flag
 This flag is set to 1 when a carry occurs in the operation result.
 Overflow flag (7 [bit 19] in Fig. 3.14)
 V (R) oVerflow flag
 This flag is set to 1 when the operation result overflows (or underflows). Also, this flag is reset by reading.
 Program end interrupt flag (8 [bit 18] in Fig. 3.14)
 E (R) End flag
 When the end of the program by the ENDI instruction is detected, this flag becomes 1 and an interrupt for the end of the program is generated. Also, this flag is reset by reading.
 Step execution control bit (9 [bit 17] in Fig. 3.14)
 ES (W) Execute Step control bit
 Writing 1 while the program is stopped (when the program execution control flag is 0) executes the program one step. It is invalid during execution.
 Program execution control flag (10 [bit 16] in Fig. 3.14)
 EX (R / W) program EXecute control flag
 Controls the execution of the program. Writing 1 starts execution, writing 0 stops execution. Also, by reading this flag, it can be determined whether it is running (1) or stopped (0).
 Program counter transfer permission bit (11 [bit 15] in Fig. 3.14)
 LE (W) Load Enable bit
 Bits that determine whether to load the program RAM address (see below) into the program counter. Writing 1 to this bit loads the program RAM address at that time into the program counter. It cannot be loaded during program execution (when the program execution control flag is 1).
 Program RAM address (12 to 19 [bit 7 to 0] in Fig. 3.14)
 P7-0 (R / W) Program RAM address bit7-0
 Stores the address of the program RAM. You can set the start address and read the stop address.
 caution
 When reading the DSP program control port
 Please note that the following phenomena occur.
  1.  The V flag (overflow flag) will be cleared.
     The V flag cannot be checked during DSP execution.
  2.  The DSP end interrupt factor may not occur.
     If the program end interrupt flag is monitored (read) during DSP execution, the DSP end interrupt may not occur. Therefore, do not read this address in the case of a program that obtains the end of DSP by an interrupt.
 ◆ DSP program RAM data port
 Figure 3.15 shows the details of the DSP program RAM data port. By writing the data to be stored in the area of the program RAM from the CPU, that data is loaded into the program RAM. After loading, the program RAM address of the program control port is incremented by 1. However, it is write-protected while the program is being executed (when the program execution control flag is 1). This port is for export only.
 Figure 3.15 DSP program RAM data port (register: PPD) Initial value indefinite
 bit
 31
 twenty four
 twenty three
 16
 15
 8
 7
 0
 25FE0084 1 2 3 4 5 6 7 8 9 Ten 11 12 13 14 15 16 17 18 19 20 twenty one twenty two twenty three twenty four twenty five 26 27 28 29 30 31 32
 ◆ DSP data RAM address port
 Figure 3.16 shows the details of the DSP data RAM address port. Set the address of the data RAM to access. However, it is write-protected while the program is being executed (when the program execution control flag is 1).
 Figure 3.16 DSP data RAM address port (register: PDA) Initial value 00000000H
 bit
 31
 twenty four
 twenty three
 16
 15
 8
 7
 0
 25FE0088 − − − − − − − − − − − − − − − − − − − − − − − − 1 2 3 4 5 6 7 8
 Data RAM selection bits (1-2 [bits 7-6] in Figure 3.16)
 RA7-6 (W) RAM select bit bit 7-6
 Represents a page of RAM data to read. Table 3.5 shows the RAM page selection.
 Table 3.5 RAM page selection
 bit
 Selected RAM page
 RA7
 RA6
 0
 0
 Select RAM0
 0
 1
 Select RAM1
 1
 0
 Select RAM2
 1
 1
 Select RAM3
 Data RAM address (3 to 8 [bit 5 to 0] in Figure 3.16)
 RA5-0 (W) RAM address bit5-0
 Specifies the address of the data RAM to read.
 ◆ DSP data RAM data port
 Figure 3.17 shows a detailed view of the DSP data RAM data port. Access the data in the data RAM from this port. Accessing the DSP data RAM address port increments the data RAM address by one. However, access is prohibited during program execution (when the program execution control flag is 1). This port can be read and written.
 Figure 3.17 DSP data RAM data port (register: PDD) Initial value indefinite
 bit
 31
 twenty four
 twenty three
 16
 15
 8
 7
 0
 25FE008C 1 2 3 4 5 6 7 8 9 Ten 11 12 13 14 15 16 17 18 19 20 twenty one twenty two twenty three twenty four twenty five 26 27 28 29 30 31 32
 caution
 Data RAM notes
 If the pause function (EP) and the one-step execution function (ES) of the program control port of the DSP are used during DSP execution, the data in the data RAM inside the DSP is not guaranteed, so strictly observe the following items. Please give me.
  1.  The DSP pause function (EP) and one-step execution function (ES) are prohibited from being used in actual applications.
     (These functions are originally for debugging, and the ones used when debugging the DSP will work, but the contents of the data RAM inside the DSP will not be guaranteed.)
  2.  For access to the DSP data RAM address port and DSP data RAM data port, make sure that the program execution control flag (EX) and D0-Bus DMA execution flag (T0) of the DSP control port are both "0". Please issue from.
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