HARDWARE ManualSCU User's Manual
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SCU User's Manual

Chapter 3 Register Details


■ 3.1 Register list

Table 3.1 lists the SCU registers. Below, the items are divided according to the register generic name, and the registers are explained in detail.

Table 3.1 Register list
Register generic
 Register name
 Start address
 Last address
 size
 DMA control register
 Level 0-DMA set register
 25FE0000 H
 25FE0017 H
 24 bytes
 Level 1-DMA set register
 25FE0020 H
 25FE0037 H
 24 bytes
 Level 2-DMA set register
 25FE0040 H
 25FE0057 H
 24 bytes
 DSP control port
 DSP program control port
 25FE0080 H
 25FE0083 H
 4 bytes
 DSP program RAM data port
 25FE0084 H
 25FE0087 H
 4 bytes
 DSP data RAM address port
 25FE0088 H
 25FE008B H
 4 bytes
 DSP data RAM data port
 25FE008C H
 25FE008F H
 4 bytes
 Timer register
 Timer 0 compare register
 25FE0090 H
 25FE0093 H
 4 bytes
 Timer 1 set data register
 25FE0094 H
 25FE0097 H
 4 bytes
 Timer 1 mode register
 25FE0098 H
 25FE009B H
 4 bytes
 Interrupt control register
 Interrupt mask register
 25FE00A0 H
 25FE00A3 H
 4 bytes
 Interrupt status register
 25FE00A4 H
 25FE00A7 H
 4 bytes
 A-Bus control register
 A-Bus interrupt acknowledge
 25FE00A8 H
 25FE00AB H
 4 bytes
 A-Bus setting register
 25FE00B0 H
 25FE00B7 H
 8 bytes
 A-Bus refresh register
 25FE00B8 H
 25FE00BB H
 4 bytes
 SCU control register
 SCU SDRAM select register
 25FE00C4 H
 25FE00C7 H
 4 bytes
 SCU version register
 25FE00C8 H
 25FE00CB H
 4 bytes

Be sure to use the cache-through address to access the SCU registers.


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HARDWARE ManualSCU User's Manual
Copyright SEGA ENTERPRISES, LTD., 1997