★ HARDWARE Manual ★ SCU User's Manual ★ 3.1 Register List
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SCU User's Manual / Chapter 3 Register Details
■ 3.7 SCU control register
◆ SDRAM selection register
- The SCU has registers that specify the SDRAM configuration. Figure 3.31 shows the SDRAM selection register. This register is located at address 25FE00C4H in the SCU.
- Figure 3.31 SCU SDRAM selection bit (register: RSEL) Initial value 00000000H
| bit | 31 | | | | | | | twenty four | twenty three | | | | | | | 16 | 15 | | | | | | | 8 | 7 | | | | | | | 0 |
| 25FE00A0 | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | 1 |
- SDRAM selection bit ( 1 [bit 0] in Fig. 3.31 )
- RSEL (R / W) RAM SELect bit
- RSEL = 0: Specify 2Mbit × 2.
- RSEL = 1: Specify 4Mbit × 2.
- <Supplementary information about initial values>
- The SDRAM selection bit is set to 2M bits x 2 (RSEL = 0) by power-on reset. You need to reset it to RSEL = 1 and change it to 4M bits x 2.
This setting change is done in the BOOT-ROM, so the user does not need to change it. ◆ SCU version register
- The SCU has a register that represents the chip version. This register is located at address 25FE00C8H in the SCU. Figure 3.32 shows the version register.
- Figure 3.32 SCU version register (register: VER) Initial value 00000000H
| bit | 31 | | | | | | | twenty four | twenty three | | | | | | | 16 | 15 | | | | | | | 8 | 7 | | | | | | | 0 |
| 25FE00A0 | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | − | 4 | 3 | 2 | 1 |
- Version number ( 1 to 4 [bit 3 to 0] in Fig. 3.32 )
- VER3-0 (R) VERsion number bit3-0
- Represents the version of the SCU chip. Since there are 4 bits, it supports chip versions from 0 to 15.
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★ HARDWARE Manual ★ SCU User's Manual ★ 3.1 Register List
Copyright SEGA ENTERPRISES, LTD., 1997