<18/86> VDP2 User's Manual / 3.4 Color RAM Mode

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VDP2 User's Manual / Chapter 3 RAM

■ 3.4 Color RAM mode

The color RAM is 32K bits (2K words) and the stored color data is used for all palette-style sprites and scroll screens. Color data is stored by selecting either 15-bit data with 5 bits each for RGB or 24-bit data with 8 bits each for RGB. You can also use the extended color calculation function by dividing into 16K bits (1K words) and storing the same color data for each. There are three types of storage methods for color data in color RAM.

Mode 0: RGB 5 bits each, 15 bits in total, 1024 color setting
Mode 1: RGB 5 bits each, 15 bits in total, 2048 color setting
Mode 2: 1024 color settings with a total of 24 bits of 8 bits each for RGB

When outputting color data, it is fixed to 8 bits for each of RGB, so if the color data stored in the color RAM is 5 bits for each of RGB, 0 is added to the lower 3 bits.
When the special color calculation mode is specified as mode 3, the most significant bit of the color RAM data becomes the color calculation enable bit. For the special color calculation mode, refer to " 12.2 Special Color Calculation Function ".

Figure 3.9 shows the structure of the color data on the color RAM.

Figure 3.9 Color data structure on color RAM

● For RGB 5 bits each

Color data

CC	BLUE data 5 bits					GREEN data 5 bits					RED data 5 bits
15	14	13	12	11	Ten	09 09	08 08	07 07	06 06	05 05	04	03 03	02 02	01 01	00

↓

Output BLUE data	BLUE data 5 bits					0	0	0
Output BLUE data	07 07	06 06	05 05	04	03 03	02 02	01 01	00

Output GREEN data	GREEN data 5 bits					0	0	0
Output GREEN data	07 07	06 06	05 05	04	03 03	02 02	01 01	00

Output RED data	RED data 5 bits					0	0	0
Output RED data	07 07	06 06	05 05	04	03 03	02 02	01 01	00

[Note] The most significant bit CC is the enable bit when the special color calculation mode is mode 3.

● For RGB 5 bits each

Color data

CC	ignore							BLUE data 8 bits
31	30	29	28	27	26	twenty five	twenty four	twenty three	twenty two	twenty one	20	19	18	17	16

GREEN data 8 bits								RED data 8 bits
15	14	13	12	11	Ten	09 09	08 08	07 07	06 06	05 05	04	03 03	02 02	01 01	00

↓

Output BLUE data	BLUE data 8 bits
Output BLUE data	07 07	06 06	05 05	04	03 03	02 02	01 01	00

Output GREEN data	GREEN data 8 bits
Output GREEN data	07 07	06 06	05 05	04	03 03	02 02	01 01	00

Output RED data	RED data 8 bits
Output RED data	07 07	06 06	05 05	04	03 03	02 02	01 01	00

[Note] The most significant bit CC is the enable bit when the special color calculation mode is mode 3.

Figure 3.10 shows the color data to be written to the color RAM.

Figure 3.10 Color RAM color data

● Mode 0
  100000H ┌──────────────┐
         │ 16 bits x 1024 colors │ 1K word ← ┐
         │ │ │ Same color data ├ ─ ─ ─ ─ ─ ─ ─ ┤ │
         │ 16 bits x 1024 colors │ 1K word ← ┘
         │ │
  100FFFH └──────────────┘


● Mode 1
  100000H ┌──────────────┐
         │ │
         │ │
         │ 16-bit x 2048 colors │ 2K word │ │
         │ │
  100FFFH └──────────────┘


● Mode 2
  100000H ┌──────────────┐
         │ │
         │ │
         │ 32-bit x 1024 colors │ 2K word │ │
         │ │
  100FFFH └──────────────┘

● RAM control register

The RAM control register specifies the banking of VRAM, the purpose of VRAM on the rotating scroll screen, and the color RAM mode. It is a read / write 16-bit register located at address 18000EH. After turning on the power or resetting, the value will be cleared to 0, so be sure to set it.

RAMCTL 18000EH

CRKTE	---	CRMD1	CRMD0	---	---	VRBMD	VRAMD
15	14	13	12	11	Ten	09 09	08 08

07 07
06 06
05 05
04
03 03
02 02
01 01
00
RDBSB11
RDBSB10
RDBSB01
RDBSB00
RDBSA11
RDBSA10
RDBSA01
RDBSA00

Color RAM coefficient table enable bit: Color RAM coefficient table enable bit ( CRKTE), bit 15

07 07	06 06	05 05	04	03 03	02 02	01 01	00
RDBSB11	RDBSB10	RDBSB01	RDBSB00	RDBSA11	RDBSA10	RDBSA01	RDBSA00

See 6.4 Coefficient Table Control.

Color RAM mode bits : Color RAM mode bits (CRMD1, CRMD0), bits 13, 12

Specifies the color RAM mode.

CRMD1	CRMD0	mode	process
0	0	0	1024 color setting with 5 bits each for RGB
0	1	1	2048 color setting with 5 bits each for RGB
1	0	2	1024 color setting with 8 bits each for RGB
1	1	---	Setting prohibited

Be sure to set this bit before storing color data in the color RAM.
When mode 0 is set, by writing data to the first half of the color RAM address, the same data as the first half is also written to the second half at the same time.
When the CRKTE bit is set to 1, set the color RAM mode to mode 1. At that time, the latter half of the color RAM (100800H to 100FFFH) is used for the coefficient table data, so the color data cannot be stored.

VRAM mode bits : VRAM mode bits (VRBMD, VRAMD), bits 9, 8

See 3.2 VRAM Bank Split.

Rotation data bank specification bit : RBG0 data bank select bit (RDBSA00 to RDBSB11), bits 7 to 0

Refer to " 6.2 Rotation Scroll Screen Display Control".
When the CRKTE bit is set to 1, do not specify that 4 banks of VRAM should be used as RAM for coefficient table data.

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★ HARDWARE Manual VDP2 User's Manual ★ Chapter 3 RAM