★ HARDWARE Manual ★ VDP2 User's Manual ★ Chapter 6 Rotating scroll screen
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VDP2 User's Manual / Chapter 6 Rotating Scroll Screen

● RAM control register

The RAM control register specifies the banking of VRAM, the intended use of VRAM on the rotating scroll screen, and the color RAM mode. A read-write 16-bit register located at address 18000EH. After turning on the power or resetting, the value will be cleared to 0, so be sure to set it.

RAMCTL 18000EH
 15
 14
 13
 12
 11
 Ten
 09 09
 08 08
 CRKTE
 ---
 CRMD1
 CRMD0
 ---
 ---
 VRBMD
 VRAMD

 07 07
 06 06
 05 05
 04
 03 03
 02 02
 01 01
 00
 RDBSB11
 RDBSB10
 RDBSB01
 RDBSB00
 RDBSA11
 RDBSA10
 RDBSA01
 RDBSA00

Color RAM coefficient table enable bit: Color RAM coefficient table enable bit ( CRKTE), bit 15
Specifies whether to store the coefficient table in color RAM.

CRKTE process
0 Store the coefficient table in VRAM
1 Coefficient table stored in color RAM

Color RAM mode bits : Color RAM mode bits (CRMD1, CRMD0), bits 13, 12
Refer to " 3.4 Color RAM Mode".
When the CRKTE bit is set to 1, set the color RAM mode to mode 1. At that time, the latter half of the color RAM (100800H to 100FFFH) is used for the coefficient table data, so the color data cannot be stored.

　　

VRAM mode bits : VRAM mode bits (VRAMD, VRBMD), bits 9, 8
See 3.2 VRAM Bank Split.

　　　　

Rotation data bank specification bit : Data bank select bit (RDBSA01, RDBSA00, RDBSA11, RDBSA10, RDBSB01, RDBSB00, RDBSB11, RDBSB10), bits 7 to 0
Refer to " 6.2 Rotation Scroll Screen Display Control".
When the CRKTE bit is set to 1, do not specify that 4 banks of VRAM should be used as RAM for coefficient table data.

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★ HARDWARE Manual VDP2 User's Manual ★ Chapter 6 Rotating scroll screen
Copyright SEGA ENTERPRISES, LTD., 1997